adamdea
You are not a sound quality evaluation device
That makes sense, John. So in adapting the board to take dsd input they have actually downgraded the overall design.I suspect the jitter is higher as the design is not a "True" Async USB design - by that I mean the DAC's Master clock is not used to synchronise the USB interface. You can see the x3 crystals on the XMOS board used to clock the USB port, while the DAC's Master clock is hidden below - this is not beneficial to performance.
On our little XMOS DAC PCB there are two DAC Master Clocks (the silver Cans near the test terminal marked "MCK", one for 44.1KHz based sampling rates and the second for 32KHz & 48KHz based sampling rates - these are then used as the reference clock for the ASync USB Data Buffer / flow control, this is TRUE ASync USB DAC operation.
https://dl.dropboxusercontent.com/u/86116171/XMOS DAC.png
I think the jitter is higher for spdif too, though. Have they done something similar with the S/PDiF receiver too?