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MDAC First Listen (part 00110001)

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Sorry, I finally cracked the issue with the Superior PCB, so tomorrow I'll post a more concise update, my time has been split between this and the XMOS PCB - but both are now working as of this evening...
 
Sorry, I finally cracked the issue with the Superior PCB, so tomorrow I'll post a more concise update, my time has been split between this and the XMOS PCB - but both are now working as of this evening...

:) :)

Good work John! :D
 
I promised a more concise update "today" - but its already 4.20am and we are shot... but it has been a very productive day with the "FDAC" XMOS development board - we have DSD256 and PCM 768KHz digital working :) the hardware can support up to PCM 1.5MHz - but limited by the software / device drivers...

I'll update further tomorrow.
 
mrfibble,

I'll forward details as soon as I've completed the testing of the superior PCB to avoid a backlog of MDAC's here.

Hi John

Could you give me a very rough idea of when I will be able to send my DAC in for repair? I'm not in a hurry, I can wait.

I ask because I already parceled up my DAC. If it is going to be a few weeks I will unpack it because I want to listen to music :)

Cheers

mrflibble
 
Hi John

Could you give me a very rough idea of when I will be able to send my DAC in for repair? I'm not in a hurry, I can wait.

I ask because I already parceled up my DAC. If it is going to be a few weeks I will unpack it because I want to listen to music :)

Cheers

mrflibble

Sorry - we have had a few "productive" battles recently, so it will be a couple more weeks atleast while I complete the first Superior PCB's and other work...
 
Hi John,
Well done on the Xmos development board. One step closer :)

Was discussing with a friend about the Vfets amps and I was trying to find your last post where you were mentioning the number of vfets devices in use per channel and the rated power output, but can't find it.. Can you please clarify?
Also what are the latest development news on the Vfets and next steps?
Again, can't wait :)
 
Theres 2x pairs of VFET's (its a fully balanced amplifier) per Monoblock operating in pure ClassA - then with 16 pairs (or dual Die 32 pair devices) of "Current Dumping" lateral MOSFETs for the Brute force current demands of the Bridge Tied Load (BTL).

Due to this current dumping design, the VFETs then operate in there most linear mode (always ClassA).
 
I promised a more concise update "today" - but its already 4.20am and we are shot... but it has been a very productive day with the "FDAC" XMOS development board - we have DSD256 and PCM 768KHz digital working :) the hardware can support up to PCM 1.5MHz - but limited by the software / device drivers...

I'll update further tomorrow.

Congrats on the breakthroughs!

Enabling DSD 512 mode much effort?
 
Congrats on the breakthroughs!

Enabling DSD 512 mode much effort?

Its more to do with the XMOS supplied device drivers then FDAC / FDACLite hardware... the Hardware can support Octal Rate DSD - so DSD 22.6MHz if there ever was a need!

Jarek's updating the XMOS PCB - and I'm back on the superior board, we can test DSD512 on the next PCB spin in a couple of weeks - XMOS are very vague about Driver limits and the such.
 
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