Thanks for all your valuable contributions here and in the DIY forums. I have some questions about the MDAC, hope you don't mind.
1) Besides the all new CROSS i/v (is this the current dumping circuit you briefly mentioned somewhere?), are there any other differences in the DAC section of the 8200 CD and MDAC, or is it exactly the same? Because i seem to get this feeling like the MDAC is the DAC section of the 8200, just with a new i/v stage. Correct me if I’m wrong.
The CROSS output stage is not a current dumping stage - Current Dumping is reserved for power amplifiers.
Current
Regulated
Output
Stage
Solution is a circuit solution I designed to regulated the Bias current in an A/B output stage - But as our output stage operates in full Class A - there's is no need for Current regulation in the MDAC OPS, however a secondary effect of CROSS is to reduced the output stage impedance and greater open loop linearity - which is beneficial.
MDAC has a very different Digital signal path - optimised for external "DAC" operation - so its more "DAC" then CD.
This includes dual cascaded DPLL's to attenuate the input Jitter before the final ESS ASRC attenuation stage. There's also a small Micro based DSP used to analyse the Data stream for bit depth analysis, XP LSB correction, Bit Perfect test and the D3E.
2) Regarding CROSS, full discrete = no op amps used for i/v stage at all?
CROSS is just an "Output stage solution" it can be used with an OPAMP input stage or a fully discrete input stage - MDAC uses a fully discrete JFET based input stage, fed to CROSS. There are no OPAMP’s in the Analogue output stage – it’s a fully discrete design.
Heavily degenerated, Bootstrapped Cascoded JFETS are used in the input DIFF pair to minimise RF rectification / demodulation of the DAC’s RF products.
We don’t use the ESS DAC in current output mode (I/V), but rather in Voltage mode as this allows us to use passive LPF before the RF sensitive analogue stage.
With current mode (I/V) you cannot pre-filter the DAC’s RF energy – this results in a “Hardness” and “Brightness” to the SQ.
The only positions OPAMP’s are used are for the “discrete” Low noise regulator stages.
3) I understand the sabre is very sensitive to the quality of the PSU and clocks used. How well do the regulators and clocks measure? According to the specs, the MDAC has less filtering and regulation than the 8200. Is this strictly due to the smaller chassis or was it not necessary to have as much regulation in the MDAC? During your testing, was the use of a wall wart really detrimental to measurements?
Yes, the ESS DAC is very sensitive to its PSU arrangements. The MDAC does not have less regulation around the DAC section – the only reason on the whole it has less regulators compared to the CD / CDQ is because the extra regulators are used within the CD / Servo sections (circuits which obviously the MDAC does not contain).
The MDAC does have less PSU filtering due to space limitations within the smaller chassis, however the reduced capacitance is associated with the Bulk Capacitors after the AC rectification stage. When the MDAC is used with an external PSU (we will be releasing a HQ low noise DC PSU compatible with the MDAC) – the missing Bulk capacitance will be restored / and increased upon.
The measurements where restricted LF noise on the LAB bench in China – there’s a huge amount of LF noise on the China AC mains supply (my Lab was based in the factory complex at the time). This LF noise causes all sorts or Ground currents to flow around the test bench and even magnetically induced. AC related artefact’s are below -135dB – so very low. I don’t recall much difference between using the MDAC’s AC supply or the bench supply, I don’t really pay attention as the levels are so inherently low, there was nothing to be concerned about.
The MDAC PSU is not a “Wall Wart” but an inline transformer with separated AC supply connections to Digital and Analogue sections.
Sonically, I believe that the MDAC can be improved with an external low Noise, low Impedance DC supply
Our Clock circuit is a discrete low noise 5th overtone oscillator – optimised for best short-term phase noise over longer term accuracy (Drift).
The High Q of a 5th Overtone oscillator and higher current’s within the Discrete circuit achieve good short term phase noise. We measured at the DAC Xout pin 1.6pS Random noise integrated over 10kHz to 40MHz and a single spurie at 800fS (0.8pS) somewhere around 30MHz… so extremely good jitter performance – remember this is measured at the DAC’s Xout – so includes atleast some of the DAC’s substrate noise.
4) Are there any coupling caps in the i/v ?
DC coupled throughout!!! – across my dead body will there be any AC coupling capacitors!!! DC Offset is trimmed on the production line.
Asking all these questions because i had a diy sabre project but i scrapped it and am considering the mdac.
Given the plethora of sabre dacs that are on the market right now, what would you say is the main difference, technically-speaking and in the implementation, that sets the mdac apart from the rest? From your numerous posts in diyhifi and DiyAudio, it's clear you really know what you're doing, so an in-depth technical reply would be nice. Thanks
Everything about our design – from the cascaded Digital Jitter attenuation stages, our own Digital filters, D3E decorrelator, isolated time domains, high performance clock, multiple ultra low noise PSU's, CROSS analogue stages and Async USB etc...
