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MDAC First Listen (Part 00101010)

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The hard part of designing the clock-lock interface was to insure that the inherent Jitter of the Clock-Lock "Clock" signal does not degrade the clock in the Detox.

https://dl.dropboxusercontent.com/u/86116171/Detox Clock Proto.JPG

If you look at my Rats nested prototype circuit of the Detox Clocklock circuit in the above link you can see the x3 Crystals (Silver metal cans) - these are arrange to "filter" the incoming clock signal removing the Phase noise. The crystal filter only passes a very narrow signal bandwidth, any signal that falls outside of this bandwidth (Jitter Phase noise) is heavily attenuated.

https://dl.dropboxusercontent.com/u/86116171/Detox Band Pass.jpg

This rather phallic shaped filter characteristic (The final filter has a stopband attenuation of around -90dB) is the first stage of rejecting external Jitter on the Clocklock link, this is then followed by a PLL circuit with a very low frequency cutoff point to further attenuate any remaining jitter.

I'll verify the final performance levels on the "production PCBs" but after such lengths I don't expect (I'd like to believe) that the Detox is immune to external jitter.
Just to clarify -am I right in thinking that the purpose of the clock link back from the mdac/fdac is to synchronise the usb clock with the dac clock? not necessarily to make the dac clock less jittery as such, although bthe jitter may (possibly) be made more benign by randomising/dithering it? And the purpose of synchronising is to reduce the interaction between the usb clock and the dac clock(?)

Sorry if I have got this wrong, but I've slightly lost the thread of what we are going, especially in the light of the point that a great distributed clock could end up more jittery than an fairly good local clock (aka the argument as to why external aftermarket clocks aren't necessarily a good idea unless you need to synchronise devices.) Of course in the case of a S/PDIF device, sending the clock back allows the conversion clock to be independent of the transmitting clock. But since we are using asych usb here the conversion clock is not derived from the transmitting clock anyway. So the point of sending the clock back is therefore more subtle
 
Just to clarify -am I right in thinking that the purpose of the clock link back from the mdac/fdac is to synchronise the usb clock with the dac clock? not necessarily to make the dac clock less jittery as such, although the jitter may (possibly) be made more benign by randomising/dithering it? And the purpose of synchronising is to reduce the interaction between the usb clock and the dac clock(?)

Yes, in consideration that digital logic offers very poor isolation between input and output jitter, the clock-lock data streams insures that the incoming USB data is synchronizes with the audio conversion clock so that all clocks including the USB data are derived from the audio master clock.

Sorry if I have got this wrong, but I've slightly lost the thread of what we are going, especially in the light of the point that a great distributed clock could end up more jittery than an fairly good local clock (aka the argument as to why external aftermarket clocks aren't necessarily a good idea unless you need to synchronise devices.)

The Detox Clocklock interface attenuates the MDAC/FDAC clock output jitter to below the Noise Floor so that there is no measurable difference between the Detox's own onboard clock or when externally clock locked - the circuit took a good few days to develop. I have the advantage that that the input clock is a known variable with tight PPM error and slow drift which allowed the use of a cascaded crystals to act as a very narrow passband filter.


Of curse in the case of a S/PDIF device sending the clock back allows the conversion clcok to be indpedent of the transmitting clock. But since we are using asych usb here the conversion clock is not derived from the transmitting clock anyway. So the point of sending the clock back is therefore more subtle

I point you to the my earlier test which shows the very finite isolation between logic gates on a silicon substrate :-

http://www.pinkfishmedia.net/forum/showpost.php?p=2695927&postcount=1373

This proves the need to do everything in ones power to prevent unwanted Phase noise entering the DAC as digital logic has very poor isolation due to limited gain of the logic block and other device parasitics (unwanted capacitance and inductance etc).

When I designed the discrete 1 bit converter of the Dacapo I coined the term "Logic Induced Modulation" LIM to describe this coupling effect between individual logic gates - theres no mystery around LIM, rather the limited gain of the logic cell to "square" the input pulse and other real world parasitics of a physical device.

The is no such thing as true finite 1 and 0 in real world logic hardware, if you zoom out it looks like 1's and 0's but zoom in with greater dynamic range and you see that its really only an Analogue signal represented by two discrete voltage states with significant dynamic range between these two states. OK for computation, but when we are constructing an analogue signal with over 120dB DR the finite SNR between 1's and 0's becomes a problem which manifests itself as Jitter.... in audio conversion there is no such thing as "only Ones and Zeros"....
 
Detox payment sent .... I sense we are almost getting there!

Killie - thank you, every payment helps with the cost of development :)

My ideas have now been tested as real world circuits, I'll have to design the PCB, and once that's completed then the chassis :) but the hard part which is the clock circuit has now been bench tested in rats nest form :)
 
In answer to your PM, your salvaged MDAC will be swapped directly for the FWC at no extra cost to you :)

Later I'll try and repair the salvaged units to turn them back into cash - but TBH I don't see me having the time...

...and Detox installment paid.
 
"The is no such thing as true finite 1 and 0 in real world logic hardware, if you zoom out it looks like 1's and 0's but zoom in with greater dynamic range and you see that its really only an Analogue signal represented by two discrete voltage states with significant dynamic range between these two states. OK for computation, but when we are constructing an analogue signal with over 120dB DR the finite SNR between 1's and 0's becomes a problem which manifests itself as Jitter.... in audio conversion there is no such thing as "only Ones and Zeros".... "

John
This is a very informative and valuable insight. It shows how little the "ones and zeros" acolytes actually know.
 
Yes, in consideration that digital logic offers very poor isolation between input and output jitter, the clock-lock data streams insures that the incoming USB data is synchronizes with the audio conversion clock so that all clocks including the USB data are derived from the audio master clock.

.....
The is no such thing as true finite 1 and 0 in real world logic hardware, if you zoom out it looks like 1's and 0's but zoom in with greater dynamic range and you see that its really only an Analogue signal represented by two discrete voltage states with significant dynamic range between these two states. OK for computation, but when we are constructing an analogue signal with over 120dB DR the finite SNR between 1's and 0's becomes a problem which manifests itself as Jitter.... in audio conversion there is no such thing as "only Ones and Zeros"....
Thanks. As I understand this point,
  • every time a clock ticks the tick slightly interferes with the other clocks and hence ultimately the conversion clock
  • the tick may also directly affect the analog output
If the clocks tick in time there won't be any interference between them.
I'm not quite sure I follow why this is better from the point of view of the pollution which clocks bring directly to the analog output- is the idea that it's better that there should be a single RF component derived from the conversion clock rate rather than lots of different RF components?

Sorry to be tiresome, but assuming the above simplistic analysis is correct, does the delay of the clock pulse going from conversion clock to regen clock back to the dac make any difference? Presumably the usb clock would be ticking slightly behind the conversion clock (sorry if I have misunderstood-if it doesn't work like that) I guess it must be very slight, but since jitter gets measured in picoseconds it made me wonder. Even at the speed of light it seems to me that a signal would take 1.66 x 10 ^-9 s to travel 50 cm.
 
Thanks. As I understand this point,
  • every time a clock ticks the tick slightly interferes with the other clocks and hence ultimately the conversion clock
  • the tick may also directly affect the analog output
If the clocks tick in time there won't be any interference between them.
I'm not quite sure I follow why this is better from the point of view of the pollution which clocks bring directly to the analog output- is the idea that it's better that there should be a single RF component derived from the conversion clock rate rather than lots of different RF components?

You will still get mixing effects between two different fixed clock frequencies but these componenets will be fixed in frequency's, when clocks drift against each other then you also get drifting "mixed" frequencies. Due to the phase noise being heavily correlated with the audio data being processed this results in a direct modulation of these "mixed" frequency components by the audio data which is very undesirable.

Time delay between devices does not shift frequency, only the phase relationship between device clocks.
 
Yes, in consideration that digital logic offers very poor isolation between input and output jitter, the clock-lock data streams insures that the incoming USB data is synchronizes with the audio conversion clock so that all clocks including the USB data are derived from the audio master clock.
I think you may have answered this before so forgive me asking but I can't remember your answer - are you deriving the 12Mhz USB clock (or 24Mhz clock) from the audio clocks of 22.XXXMhz or 24.XXXMHz? Does this make them synchronous? - I don't see it, sorry.

Or are you saying that the Detox USB clock & the FDAC's USB clock will both be synchronous?

If so, could you not just send the FDAc's clock back to the Detox device for use as it's local clock - do you need the clocklock function?


The Detox Clocklock interface attenuates the MDAC/FDAC clock output jitter to below the Noise Floor so that there is no measurable difference between the Detox's own onboard clock or when externally clock locked - the circuit took a good few days to develop. I have the advantage that that the input clock is a known variable with tight PPM error and slow drift which allowed the use of a cascaded crystals to act as a very narrow passband filter.




I point you to the my earlier test which shows the very finite isolation between logic gates on a silicon substrate :-

http://www.pinkfishmedia.net/forum/showpost.php?p=2695927&postcount=1373

This proves the need to do everything in ones power to prevent unwanted Phase noise entering the DAC as digital logic has very poor isolation due to limited gain of the logic block and other device parasitics (unwanted capacitance and inductance etc).

When I designed the discrete 1 bit converter of the Dacapo I coined the term "Logic Induced Modulation" LIM to describe this coupling effect between individual logic gates - theres no mystery around LIM, rather the limited gain of the logic cell to "square" the input pulse and other real world parasitics of a physical device.

The is no such thing as true finite 1 and 0 in real world logic hardware, if you zoom out it looks like 1's and 0's but zoom in with greater dynamic range and you see that its really only an Analogue signal represented by two discrete voltage states with significant dynamic range between these two states. OK for computation, but when we are constructing an analogue signal with over 120dB DR the finite SNR between 1's and 0's becomes a problem which manifests itself as Jitter.... in audio conversion there is no such thing as "only Ones and Zeros"....

Yes, I completely agree with this - digital signalling is just a protocol that sits on top of analogue signalling.
 
"The is no such thing as true finite 1 and 0 in real world logic hardware, if you zoom out it looks like 1's and 0's but zoom in with greater dynamic range and you see that its really only an Analogue signal represented by two discrete voltage states with significant dynamic range between these two states. OK for computation, but when we are constructing an analogue signal with over 120dB DR the finite SNR between 1's and 0's becomes a problem which manifests itself as Jitter.... in audio conversion there is no such thing as "only Ones and Zeros".... "

John
This is a very informative and valuable insight. It shows how little the "ones and zeros" acolytes actually know.
I'm always glad for the benefit of John's skill and knowledge, but the "ones and zeros" thing is actually a bit confusing, if popular. Digital and Analogue are in fact strictly ways of coding information. The information has to be coded in something. Digital audio information is transmitted using a carrier medium which is the same as the medium under which analogue information can be carried. That carrier medium is in fact not properly described as digital or analog, it just is. The carrier signal is often described as being "really analogue" but what does that mean?

In this sense the analogue signal it is no different then the ink line which can form an analog piece of information (the scale on a map representing 1 mile) or a digital piece of information (the writing of the number 1 next to that scale). The digital and analog tags apply to the scheme of encoding or decoding not the ink. Of course (unless you are a mathematical platonist) there are no ones and zeros -they have to be written in something.

What John is actually saying is that there are properties of the carrier medium which interfere with the integrity of the system of encoding/decoding the data. The quality of the printing could very well make a huge difference to the accuracy of the analogue map scale; it is going to have to be very wrong to make any difference to your ability to read the number 1. This is elementary information theory. The digital encoding is very robust to changes in the carrier medium, but not absolutely so. In fact there is a few known psychology experiment called the stroop test which shows that the colour of text affects your ability to read the word (or at least a colour word) notwithstanding that the information is symbolically encoded.

The 64,000 question is whether it is in this context actually true to a material extent that the properties of the carrier medium will make a difference to the decoding, or to out it another way whether the regeneration of the usb data make a material difference to the analogue output of the DAC. If so it should be easy to show it. John has demonstrated some intermediary effects which may serve as a transmission mechanism.

But of what and at what level? Or: where's the jitter? On the What's Best forum, an unsporting person has produced measurements showing (or purporting to show) that a regen makes no difference to the analogue output of a meridian explorer except for a very small deterioration. This may or may not apply to other devices, but it's interesting. Perhaps the effect on the analogue output needs a new way of measurement to reveal it.
 
...so wonder how all this talk of clocklock and jitter reduction will impact someone like myself using a non-Westlake DAC. Will I get any potential improvement of the USB signal being sent to my DAC beyond that offered by the 3 levels of signal regeneration and filtering?

Also, since the DETOX will be generating a clean 5V output to the downstream DAC if I understand correctly, is there any downside to having this voltage supplied to the USB input of a DAC that does not need power or a handshake such as mine?
 
I think you may have answered this before so forgive me asking but I can't remember your answer - are you deriving the 12Mhz USB clock (or 24Mhz clock) from the audio clocks of 22.XXXMhz or 24.XXXMHz? Does this make them synchronous? - I don't see it, sorry.

Yes, we use a PLL to derive the audio clock from the 84MHz master clock in the MDAC - the Detox is then locked to the 84MHz master clock 84MHz/7). The Modulator is operated from the 84MHz - everything is synchronous so that the DPLL has a fixed coefficient without modulation.

Or are you saying that the Detox USB clock & the FDAC's USB clock will both be synchronous?

Theirs no difference in operation WRT the MDAC & FDAC and clock-locking the Detox.

If so, could you not just send the FDAc's clock back to the Detox device for use as it's local clock - do you need the clocklock function?

The clocklock function DOES send the MDAC / FDAC's clock to the Detox - that's what the clocklock link is.
 
Give me a week or so to answer as I'll be working on the connector arrangement so the vendor can produce the completed ID drawings and start on the chassis prototypes.

John, any progress on the FDAC digital board?

/Lars
 
Will I get any potential improvement of the USB signal being sent to my DAC beyond that offered by the 3 levels of signal regeneration and filtering?

Thats a real big question - without the Clocklocking, the Detox's prime purpose is to "equalize" the quality of the USB data stream. However your "USB Card" which is hung of the optical PCIexprsss isolation link should do a very good job, certainly magnitudes better then your typical PC USB port. But whos to say how good really the USB output is - I still suspect the Detox's output will be significantly cleaner :)

As you already have a good "USB port" and cannot clock-lock the Detox to your DAC you will benefit less then others from the Detox... but lets see (hear) :)

Also, since the DETOX will be generating a clean 5V output to the downstream DAC if I understand correctly, is there any downside to having this voltage supplied to the USB input of a DAC that does not need power or a handshake such as mine?

No none, its a very clean supply rail so no harm can be done.
 
John, any progress on the FDAC digital board?

/Lars

Non on the design of the digital PCB as priority is the FDAC analogue PCB and chassis.

What will happen is that the Analogue PCB and chassis will goto production first, and the digital PCB will be fitted once they have been built up into the chassis and tested.

I can design a very simple Digital PCB to allow testing of the analogue board - I can see the 200 odd FDAC's sitting in the factory waiting for the digital board to be fitted so they can be finally shipped.

The Digital PCB requires little testing, basically it works or it does not so while its the last to be developed, its low risk.
 
Perhaps the effect on the analogue output needs a new way of measurement to reveal it.

!This!

I suspect I'll not manage to measure any difference on the analogue output - I cannot measure any difference between the Optimal transient and Optimal transient XD filters, but I can pick them out 100% accurately in blind test.

One day Dominik swapped the naming of the filters behind my back without telling me - and I was so So very upset and confused with myself because all of a sudden I preferred the other filter. After about half a day!!!! he just smiled and said he was just testing me - so that's a double blind test if there ever was one! :)
 
John,
when do we need to fix configurations for Fdac (as L2, L3, cd-drive... or even resistors)? Fever is starting again...
 
Not until I've released the PCB and had a chance to listen to the "Final" board.

I've been asked on many occasions about a payment installment plan for the "At Cost" PCB payments - so I'm thinking that we could split the "At cost" payments into three component parts:-

1. FWC (with PSU + front panel, Remote control)

2. Analogue PCB

3. Digital PCb + shipping costs

Just an idea... but seem sensible.
 
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