JohnW
pfm member
Really John ?
I would expect the pcb for the new board to accommodate both through hole bulk foils as well as any decent cheaper alternative with its respective form factor, being SMD or through hole again. You aren't maintaining the floating rats wires on the new board, are you ?
No No No, the PCB will have positions for both the SMD footprint and Thou Hole Vishey Bulk foil...
To test and verify each board they will be first assembled with SMD parts - these will be removed to fit the Vishay Bulks.
Can't really see why you would make it difficult to have people postpone adding these expensive bulkfoil resistors at a later stage themselves.
Edit: missed the readjustment part (DC offset ?)
Yes, its an issue of DC offset calibration and testing. The design uses what we refer to as a "Crosscoupled" output stage design. As these Crosscoupled output stages are not driven via a zero ohm source (the DAC array has a 195Ohm output impedance) the stages crosscouple there DC offsets errors - making DC offset calibration very tricky - they affect each other.
The second issue is that the Match JFETS used in the frontend have a tightly Spec. VGS On, (within 20mV) but a very poorly Spec. VGS Off (I've seen differences of 500mV) - as the Jfets are used in a linear (non saturated mode) the Offset can be all over the shop. There as an "adjustment range" offered by the PCB's offset trimmers, but there range has to be limited to prevent the poor TempCo. of the trimmer pot itself causing too much DC offset drift as the unit warms up. The only solution is to add a parallel degeneration resistor on the relevant arm of the Diff pair to bring any offset error to within the adjustment range of the onboard trimmer pots... This is a manual process...