To be honest the IP issue I don't care about but we will need some form of documentation even if it's just a circuit diagram and layout to give us a chance of getting it fixed if for any reason john is not able to.
The IP is contained in the Schematic diagram - so the MDAC2 / FDAC schematic will NEVER be publicly released - this will be part of the sales terms.
WRT component level servicing, due to many factors which make this design not fit for Mass Production - the DAC will not be serviceable by third parties (apart from simple full PCB swaps).
1. 80% of the IC's are leadless / BGA packages requiring advance rework / Xray inspection (I have invested in both BGA / XRAY PCB inspection / rework systems for MDAC2 / FDAC in house production)
2. The clock circuits require a full phase-noise measurement system for calibration and optimization - these calibration coefficients are stored during production into local EEPROM, any change of components in these circuits requires re-calibration.
3. The Detox Circuit block is based on Quantum breakdown effects of reversed biased silicon junctions - the level and spectrum is statistically analysed stored in local EEPROM so that the level can be nominalised and also "Accurately" indicated to the user.
4. The Transformer / Passive stepped attenuation level errors are calibrated and compensated for during production via software - these error levels and common-mode errors are stored in local EEPROM
5. The Turn-over point of the Clock oscillator "Oven" temperature controller is analysed and stored in Local EEPROM (as well as other operating coefficients).
6. Other unique circuit blocks I'll not discuss here - again requiring VERY specialized equipment and custom calibration software.
7. Many IC's used on the MDAC2 / FDAC PCB require production line programming / Firmware fuses set - these again require programming interfaces / adapters and NDA's from the manufacturers for the production configuration software.
For the above reasons the design is not fit for Mass production (as I've stated before), for this reason its also NOT reparable without considerable specialized equipment and custom production software with related setup test-jigs and knowledge. If you want a conventional design that can be serviced by a competent engineer without specialised equipment - then the DEVDAC is such a suitable design.
The only advantage of releasing the MDAC2 / FDAC schematics would be to allow 3rd partys to gain an insight into the unique IP I've clearly spent significant time and funds developing and this is NOT part of the deal here - never has been, never will be !!!
I still service my designs for Pink triangle (1991) upto my latest Audiolab designs - it will be the same for MDAC2 / FDAC. When my time comes, then Jarek who works with me will surely take over the task
The PCB's can be "Blind swapped" in the field as all the calibration / optimization coefficients are stored locally on each PCB - the system MCU then reads these coefficients from each uniquely calibrated PCB for operation.
Once the design is released, the level of design sophistication will become self evident and put stop to any notion of external component level repairs!