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Naim NAP250 regulator boards

When I do an AC analysis in SPICE I get the best phase margin with an ESR around 0.17ohms @ 100kHz.

The 13ohms quoted above is at 100Hz, which should mean in the region of 2 - 3ohms at 100kHz.

I know dried-out electrolytics and film caps can cause oscillation, but their ESRs are going to be much smaller (and SPICE does indeed show that when the ESR goes below 0.17ohms @100kHz things start to go pear-shaped pretty fast).

So has anyone tried a low-ESR electrolytic (say, around 3ohms@100Hz / 0.5ohms@100kHz)?



Thanks,
Jeff.
 
Hi Martin,

I did indeed see those. Not sure I'm on board, though.

Yes, the PSRR starts a dramatic decline around 3KHz:

[Edit: plot turned out to be flawed due to multiple active SPICE voltage sources.]

But it starts from a pretty pristine level; note that at 1MHz it still has -70dB of attenuation. That's plenty, isn't it?
 
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In simulation all things are possible - in reality, the reg it doesn't perform anything like as well as that... read the second linked PD post again and look where everything is referenced-to - esp the VAS in the reg - which is the noisy +ve supply rail.

And that's without making the 'obvious' move of adding a proper CCS in the tail of the LTP to increase OL gain (and therefore, available feedback, improving performance). As the NAP250 reg design stands, that change is not worth the effort.
 
So I started pulling the "flip the VAS" string to see just what would need changing. It was turning out to be a lot when I had an epiphany: JV already did this, he just put it on the wrong rail.

Take an existing Naim regulator board. Cut a gap down the middle of the ground trace. The upper half of the trace becomes -V, the lower half +V, and the previous +V and -V traces become ground. The +V and -V outputs also need to be flipped.
 
Never mind. That doesn't work because then your feedback is referenced to the dirty rail (which is even worse).
 
OK, so here's my cut at an inverted VAS (click on it to get a better view):



Did I mess anything up? (On the plus side, at least it looks like a VAS + Darlington instead of visually masquerading as an output triple.)

Interestingly, while the high frequencies are indeed (vastly) improved, we trade off the gains at lower frequencies:



Are we confident that the amp circuit has good enough PSRR at lower frequencies to be happy with this trade-off?

(BTW, my previous attenuation plot was flawed due to having two voltage sources.)
 
OK, I couldn't make my peace with sticking a JFET into a quasi-complementary design. It felt too much like adding power steering to a classic Jaguar.

Here's a BJT/diode version that's nearly as good, and fits in with the rest of JV's design better:

 
Two suggestions to make it simpler and better.

  • Change C18 for a Zener, and feed the LTP via a resistor from that point. You may need to reduce R37 a bit. You can keep a bit of C in // with the new zener to improve high frequencies a bit. Improves reference performance at low frequencies, PSRR everywhere, reduces parts count by 4.
  • Rather than having compensation feedback round just the VAS via C20 and R44, take it from the output instead. You will have to fiddle with the values to get it stable, but you can go for heavy duty brute force compensation, as it now improves PSRR and output impedance, as it includes the output device. I got flat performance out past 100KHz, and lots more PSRR (from memory over 100dB). I am at work, and don't have my files to hand. I can't remember if I used R44 at all.
 
:)

I was only going to suggest just swap C18 and D20 locations; (C35 + R17 omitted as PD suggests); and , more gilding, beef-up the ccs by splitting 22k into 2 x 10K with the midpoint tied to the raw +ve rail by a cap of at least 10uF.
 
I wasn't able to get anything good out of the recommended CCS changes.

Replacing C18 with a Zener had a big effect on the lower frequencies, and switching the Miller comp from local to global had a smaller but still useful effect on the higher. (And yeah, brute force comp: I needed 1200pF on the pos side and 1300pF on the negative; resistors dropped from both.)

I'm not getting anywhere near 100dB, but I am running my sims under stress (feeding a 4A current sink with 1A of AC on it). And it certainly performs miles better than the original under those conditions.
 
I just had a (perhaps shocking) epiphany: JV's regulators don't use Miller compensation.

I believe he started out with Miller compensation and then played around with it until it worked. But the large resistance he used negates the Miller integrator effect. It does create a big fat zero (as in "poles and zeros") around where the gain reaches unity, thereby stabilising the feedback loop.

In fact, if you stop trying to make it Miller compensation and just make it a zero (by connecting the LTP end of the capacitor to ground), you get much better performance. (Nearly 1/2 the gain of inverting the VAS & LTP, although that version also improves from this change.)

Have I missed something?
 
I brushed up on Cordell (again), and he calls this form of compensation "Lag Compensation", and indicates that its main drawback is slew rate limiting.

But I'd still like to know if I've characterised this right, and any thoughts on turning the "pseudo-Miller" zero into a "normal" zero.
 
In a power supply, the target slew rate is low - we just need a constant voltage! What would matter more is the large signal transient response - if you use say a 4A square wave, what does the rail look like?

The integrator going right to the output point gets this right - it only has one gain stage in that inner feedback loop. My guess is that the lag compensation won't do so well - there is no nested feedback. Instead, the input LTP will saturate, and charge or discharge the lag capacitor at constant rate. A simulation would check my intuition - I might have time at the weekend.
 
I'm not sure if I was doing it right, but my sims showed the lag compensation to have better attenuation from a couple of kilohertz up, and better phase and gain margins. But even with the better margins (at the base of the driver, at the base of the output, and at the output), it tended to oscillate, so clearly I was measuring something wrong.

I've gone back to this:



(which has excellent performance, mind you, but playing around with these things helps me understand them).

Cheers,
Jeff.
 
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