The 10mA is a typical figure.
What I said in the article is that you do not want to swing more than 25% of bias.
So if you total current swing is say 8mA (as in ES9018), you want to have at least 32mA total bias.
For example, Nic uses a set of 2SK369Vs with Idss of around 17mA.
So two of them in parallel (Q1//Q2, or Q3//Q4) gives about 34mA bias, thus satisfying the above mentioned rule of thumb.
It is important that Q1 has about the same Idss as Q3, and Q2 same as Q4.
Furthermore to have minimum DC offset, Idss of Q1+Q2 should equal Q3+Q4.
On top of that Q1 and Q3 should be glued onto the same heat sink, so that they thermally track each other.
The same applies to Q2 and Q4.
Of course if Idss of alll 4 FETs are exactly identical, you can aloocate them randomly.
For all those who obtain JFET sets from us, they all have a table telling them which JFET to use in which position.