The John Westlake/Lakewest MDAC/FDAC, VFET and Detox
- Thread starter Tony L
- Start date
sam_cat
C'est Crounchifique!
JohnW
pfm member
Hi Guys,
I need to post a full update here ASAP - Jareks finally had the chance to build a test firmware so we had a first listen end of January, and are now working on understanding the technical aspects of the "technology" so we can start work on the A03 version PCB which will be the DevDAC version manufactured for project sponsors here...
Unfortunately our Chord listening session has been moved to March 12th - so we dont have a great selection of DACs to compare against - basically the Project tube DAC mentioned above the little ProJect S2 dac we designed an original MDAC, and a few other DAC's.
The MDAC being the best of the bunch, and the A02 DevDAC "floors" the original MDAC... which is a good sign, as this was the original goal of the project!
I've a cold /flu so listening is put on hold while I have a hearing frequency range of a land line telephone - but this gives me time to work on the technical aspect of the DAC Array.
Before committing to the A03 design I'd need to resolve a few issues with DAC array - I'll post an update in a day or two after I've tried some modifications - and hopefully I'll be in a position for more listening - and design optimization...
With any new design (technology) - there is much to digest and understand... I'm at this "stage"...
WRT SQ, it sounds unlike any DAC we have listen too (in a very positive way), we are VERY impressed - shame we don't have the Chord units to compare with - as I've heard them described in this way...
Our fear is in trying to achieve "technical" perfection we will "destroy" the current sound quality...
I need to post a full update here ASAP - Jareks finally had the chance to build a test firmware so we had a first listen end of January, and are now working on understanding the technical aspects of the "technology" so we can start work on the A03 version PCB which will be the DevDAC version manufactured for project sponsors here...
Unfortunately our Chord listening session has been moved to March 12th - so we dont have a great selection of DACs to compare against - basically the Project tube DAC mentioned above the little ProJect S2 dac we designed an original MDAC, and a few other DAC's.
The MDAC being the best of the bunch, and the A02 DevDAC "floors" the original MDAC... which is a good sign, as this was the original goal of the project!
I've a cold /flu so listening is put on hold while I have a hearing frequency range of a land line telephone - but this gives me time to work on the technical aspect of the DAC Array.
Before committing to the A03 design I'd need to resolve a few issues with DAC array - I'll post an update in a day or two after I've tried some modifications - and hopefully I'll be in a position for more listening - and design optimization...
With any new design (technology) - there is much to digest and understand... I'm at this "stage"...
WRT SQ, it sounds unlike any DAC we have listen too (in a very positive way), we are VERY impressed - shame we don't have the Chord units to compare with - as I've heard them described in this way...
Our fear is in trying to achieve "technical" perfection we will "destroy" the current sound quality...
JohnW
pfm member
ProJect are very sensitive about what I post about there designs... we used the Tube DAC in the listening session and we all preferred the little S2 DAC we designed, and that's not to be taken as saying much in the grand scheme of things!
thanks John
I use the term "Better Late Than Never" with some anxiety and levity
from my posts you will see I am more focussed on VFET these days so the sooner the DACS progress the better
still feel regular timely updates in any form on this thread would reduce the non productive comments popping up and the resultant in-fighting [guilty as charged obviously at various stages of development]
some recent bereavements have given me some renewed perspective
I use the term "Better Late Than Never" with some anxiety and levity
from my posts you will see I am more focussed on VFET these days so the sooner the DACS progress the better
still feel regular timely updates in any form on this thread would reduce the non productive comments popping up and the resultant in-fighting [guilty as charged obviously at various stages of development]
some recent bereavements have given me some renewed perspective
torstoi
pfm Member
I just looked it up, I paid GBP450 for MDAC2 devellopment & USB detox on September 15 in 2015.
I kept out of the discussions here for the most part as I didn't think doing so or not doing so would make much of a difference to whatever outcome.
And I generally think in relation to the grand sheme of investment made and timelines held, the tone is relatively moderate and a credit to the civilised manner in this forum as such.
It will certainly help if everyone is just and simply speaking for himself & not for any virtual group of unsure size.
I for once am only speaking for myself.
I would also like to see some progress soon and some answers to the well put questions above
regarding a timeline when is happening what
& at what date can we expect what to be finished.
Thanks & have a nice evening.
I kept out of the discussions here for the most part as I didn't think doing so or not doing so would make much of a difference to whatever outcome.
And I generally think in relation to the grand sheme of investment made and timelines held, the tone is relatively moderate and a credit to the civilised manner in this forum as such.
It will certainly help if everyone is just and simply speaking for himself & not for any virtual group of unsure size.
I for once am only speaking for myself.
I would also like to see some progress soon and some answers to the well put questions above
regarding a timeline when is happening what
& at what date can we expect what to be finished.
Thanks & have a nice evening.
JohnW
pfm member
thanks John
I use the term "Better Late Than Never" with some anxiety and levity
from my posts you will see I am more focussed on VFET these days so the sooner the DACS progress the better
still feel regular timely updates in any form on this thread would reduce the non productive comments popping up and the resultant in-fighting [guilty as charged obviously at various stages of development]
some recent bereavements have given me some renewed perspective
Stephen,
V Sorry to hear about your recent bereavements.
Yes, lets see how the reception to DevDAC goes if it gives me the time to work on the VFET's or FDAC... I need better amps so the sooner the better....
iansr
pfm Member
You’re bang out of order mate, wading in with your measured and well balanced comments. What do you think this is, a civilised forum?
Others take note.
JohnW
pfm member
Good progress has been made this week on resolving some of the technical deficiencies of the DevDAC design.
The main issue with DevDAC was THD performance at lower signal levels.
At 0dB (full level) the THD balanced is 0.0003% which is plenty low, but at lower signal levels the THD increased. We could mask the THD via few tricks in the modulator, but I wanted to understand the root cause.
I've now got a solution and Jarek will be here later this week so we can work on updating the FPGA firmware and confirm results and then we plan the updates to the A03 PCB which I hope will be the production ready DevDAC.
The graphs show the initial problem, and after modification... with the design modification you can see the -60dB FFT is now perfectly clean (no visible THD), with an FFT noise floor below -150dB.
No further listening test yet as I'm still "stuffed up" after the cold / flu..
https://www.dropbox.com/s/gzckbgecv05ov1t/DEVDAC51.png?dl=0
https://www.dropbox.com/s/xulhovsu4fxj10w/DEVDAC61.png?dl=0
The main issue with DevDAC was THD performance at lower signal levels.
At 0dB (full level) the THD balanced is 0.0003% which is plenty low, but at lower signal levels the THD increased. We could mask the THD via few tricks in the modulator, but I wanted to understand the root cause.
I've now got a solution and Jarek will be here later this week so we can work on updating the FPGA firmware and confirm results and then we plan the updates to the A03 PCB which I hope will be the production ready DevDAC.
The graphs show the initial problem, and after modification... with the design modification you can see the -60dB FFT is now perfectly clean (no visible THD), with an FFT noise floor below -150dB.
No further listening test yet as I'm still "stuffed up" after the cold / flu..
https://www.dropbox.com/s/gzckbgecv05ov1t/DEVDAC51.png?dl=0
https://www.dropbox.com/s/xulhovsu4fxj10w/DEVDAC61.png?dl=0
@JohnW
Trying to interpolate/read between the lines...
at 0dB 0.0003% is -110dB
Prior to your solution the -60dB signal was producing distorion at <-120dB (ie.-60dB relative to the signal)
Now the -60dB signal distortion is <-150dB (and below the noise floor)
Does this mean there are also improvements for the 0dB signal distortion?
(a -150dB noise floor is impressive)
Thanks
Trying to interpolate/read between the lines...
at 0dB 0.0003% is -110dB
Prior to your solution the -60dB signal was producing distorion at <-120dB (ie.-60dB relative to the signal)
Now the -60dB signal distortion is <-150dB (and below the noise floor)
Does this mean there are also improvements for the 0dB signal distortion?
(a -150dB noise floor is impressive)
Thanks
I was asking if the changes also brought an improvement in the 0dB distortion
Of course, the noise floor is where it is
JohnW
pfm member
Hi Chris,
No full scale THD in Direct mode (no analogue attenuator section used for output level control) is 0.0003% due impart to the limited DC supply rails of the analogue stage opamp (+/- 5.5Vdc) resulting in a 3rd harmonic component slightly below -110dB. The DevDAC A03 "Production release" version will replace this first stage OPAMP with a discrete design - so hopefully improving upon this. I didnt want to have the added complication if a fully discrete opamp at this stage of testing (opamps just work).
The Stepped attenuator Gain block on this current A02 PCB is already a fully discrete Oamp so I've had a chance to verify the discrete circuits performance...
The THD via the variable output is higher - there will be two versions offered as the IC version used in the higher performance version is discontinued - but there is still some limited supply NOS available.
Performance version full scale THD (via variable output) 0.0008%
Standard version full scale THD (via variable output) 0.0025%
The Attenuator IC has no impact on THD level of the direct output mode (0.0003% 0dB 997Hz).
adamdea
You are not a sound quality evaluation device
0.0025%= -92dB = not great (0.0008% is only so so). is it really worth taking a 20dB hit for the dubious benefit of not using digital attenuation?
JohnW
pfm member
Ian,
The DevDAC uses a fairly standard differential Digital controlled stepped attenuater. To avoid any manipulation of the digital Data (to facilitate Native DSD without any form of digital decimation) the attenuation is performed in the analogue domain. The advantage of analogue domain attenuation is that not only is DSD preserved, but the unwanted RF "Noise" is reduced with reducing level - with digital attenuation, the audio signal level is reduced, but any "unwanted" RF leakage remains at full blast in to the amp.
JohnW
pfm member
Update on the DevDAC PCB progress...
With further hardware and firmware optimisation of the design and we are now at 126.5dB dynamic range Awtd / Balanced - with the planned refinements of the "production" PCB these might be improved further - but already VERY good! I would have been happy with -120dB under the same test conditions.
I've still got further testing, but after last weeks "marathon" progress we sat down late Sunday evening and put to paper the planned updates to the PCB and Jarek will start the PCB design this week - a couple of weeks behind schedule, but MUCH has been developed in firmware with many technical performance issues resolved...
I plan further listening sessions later this week, but the production PCB has so many planned key improvements (such as larger DAC Array and integrated opamps replaced with fully discrete design, independent discrete Analogue stage regulators, USB Detox etc) - that I will only be listening to "half the story", but if it sounds even BETTER then then the current A02 PCB there can be no complaints!
Chasing the technical performance is more about understanding the hardware design - we a have added many fimware "options" that can be selected by hardware jumpers on the PCB or buttons on the front panel PCB (no time to get the front panel Display going yet) - looking forward to listening session later this week to hear the effects of various options...
I hope in the next 3-4 weeks to release the A03 "production" level PCB files...
I believe first units can be shipped to a few select external Beta testers here on the forum in lessthen 2 months... Looks like I'll be carrying a few "Customer" DACs with me to the Munich meetup this year
With further hardware and firmware optimisation of the design and we are now at 126.5dB dynamic range Awtd / Balanced - with the planned refinements of the "production" PCB these might be improved further - but already VERY good! I would have been happy with -120dB under the same test conditions.
I've still got further testing, but after last weeks "marathon" progress we sat down late Sunday evening and put to paper the planned updates to the PCB and Jarek will start the PCB design this week - a couple of weeks behind schedule, but MUCH has been developed in firmware with many technical performance issues resolved...
I plan further listening sessions later this week, but the production PCB has so many planned key improvements (such as larger DAC Array and integrated opamps replaced with fully discrete design, independent discrete Analogue stage regulators, USB Detox etc) - that I will only be listening to "half the story", but if it sounds even BETTER then then the current A02 PCB there can be no complaints!
Chasing the technical performance is more about understanding the hardware design - we a have added many fimware "options" that can be selected by hardware jumpers on the PCB or buttons on the front panel PCB (no time to get the front panel Display going yet) - looking forward to listening session later this week to hear the effects of various options...
I hope in the next 3-4 weeks to release the A03 "production" level PCB files...
I believe first units can be shipped to a few select external Beta testers here on the forum in lessthen 2 months... Looks like I'll be carrying a few "Customer" DACs with me to the Munich meetup this year
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