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MDAC First Listen (part 00100111)

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Rosewind

Lost in Translation
John,
I can see why a holiday wouldn't work right now: maybe there'll be a return when you finally unravel it, in the form of marketable I.P.?
Meanwhile, there are a lot of people on here cheering you on.

Definitely!
 
There is practically zero discussion on the internet about other designers experience - I started a thread on DiyAudio to pass on my findings for others - but its such a specialised subject that little has been posted asides from my own results. Still I'm sure the search engines will pick it up, and it might be helpful for someone like myself in the future...

http://www.diyaudio.com/forums/equi...77a-based-phase-gain-margin-measurements.html
Ah, reminds me of the old "heisenberg's microscope" problem (the engineering workarounds) - how to measure a very sensitive system without disturbing it (too much). :)
Hope you get to the bottom of the issue without too much frustration.
 
I'm only testing the ClassA output stage at this time, later it will be included in the complete analogue stage.

The design uses multiple nested loops which have been optimised via the simulator so its important I understand the gap between the results.

I'll gradually build up the second channel and measure the "inter-stages" of the output stage section to see if I can isolate the problem area.

LTSpice is a very useful tool but as you say its only a rough guide to reality, VMOS device models tend to be optimised for switching, not surprising its what they are designed for!, if you have VMOS devices in the circuit, take the simulated results with a large pinch of salt.
 
Yep, agree about the VMOS models, but how big a pinch of salt?....

I'm building a second channel and will test the input and driver stage (sans output stage) to see how it matches the simulated results.

I did add fixed value capacitors around the MOSFET device to emulate internal junction capacitance - while I know that the junction capacitances are highly non linear I felt something was better then nothing...

If it turns out to be the MOSFET models, then the models are really pretty useless for linear applications - a fairly fundamental problem if you ask me!

I see so many people beavering away with Mosfet based amplifier simulations yet NEVER any mention of how it matches real life! that's just not serious engineering IMO!
 
Received my m dac yesterday and connected it via a toslink cable to my cocktail audio x10 media player/streamer.
Bit disappointed, sounds great between the constant on off audio stuttering.
Previously had the cocktail audio x10 connected via the same toslink cable to a NAD 565bee cd player, with no issues whatsoever.
Is there any menu option or firmware fix that I could try before having to return the unit as faulty?

Any help would be greatly appreciated.
 
Received my m dac yesterday and connected it via a toslink cable to my cocktail audio x10 media player/streamer.
Bit disappointed, sounds great between the constant on off audio stuttering.
Previously had the cocktail audio x10 connected via the same toslink cable to a NAD 565bee cd player, with no issues whatsoever.
Is there any menu option or firmware fix that I could try before having to return the unit as faulty?

Any help would be greatly appreciated.

Suggest you try setting the "Jitter rejection" in the MDAC's Menu options to Medium or High setting
 
A higher jitter rejection setting should solve the problem. If this option is not available with your current firmware version, you'll have to update (http://mdac.referata.com/wiki/Main_Page).

Nevertheless, your MDAC is most likely not faulty. This sort of problems are caused by high jitter sources.
 
And it needs to be left powered up for a few days for the organic capacitors to fully 'burn' in for max. SQ.
 
Thankyou all for the fast replies, turned out it was a dodgy loose toslink socket on the cocktail audio x10, have taken the faulty x10 back and upgraded to the x12 which is a better unit and also has coaxial digital output.
 
EazyRyder,

Also be aware that plastic fiber has a minimum bend radius, if you bend it too sharply it will crack internally and transmission path will become diffused + greatly attenuated both well result in greater Jitter + signal dropouts.
 
Am using a coaxial output to the m dac now and everything is a-ok, toslink seems to be more trouble than its worth.

Fantastic DAC by the way, I thought I couldn't get any more detail from my system and boy was I wrong.:D
 
I'm building up a second channel but without the MOSFET output stage as I (we) suspect that the VMOS simulation models (Vertical MOSFETS) are severely lacking when the devices are used in Linear application.

Ideally I would have like to have used lateral MOSFETs as I'm using in the VFET amplifier Current Dumping stage - but they are no longer available in smaller packages.

I'll have results in the nest few days,
 
I've now built the second channel (Currently without the Output Mosfets) - and am beginning to get a better understanding of whats going on with the differences between simulations and hardware results, so now feeling happier about the situation. I'll post more later as still work in progress, but its progressing in the right direction :)
 
Let's do a sweep for when the board goes into production.

I'm guessing first half of September.

This year!
 
But the Westlake team will have insider knowledge so must be barred from your sweepstake. From my reading of the runes, the MDAC2 is getting close, I've seen the board partially populated and hooked up to some 'interociter' device and several graphs with output data that looked weird. I was impressed by this 'Krell like' Meta-Luna design and believe the device is close to being born....a few months away (say 6). The world wide wait will be worth it, I'm sure with John at the helm.

(in case someone thinks I've been talking sense above....I wasn't I'm referring to the films 'This Island Earth' and 'The forbidden planet')
 
Sooooo

Ok, I'm now happy with the measured Phase and Gain Margin results I'm now getting. While they still don't match the simulated results this is to be expected with such an advance design where small errors in models quickly accumulate and throw off the results by a surprising amount. What is important that while the absolute numbers don't match the behavior does - thus if values are changed in the simulator they match the measured "trend" on the real hardware - and this is all I can reasonably ask of the simulator as a development tool :)

I'm happy to have spent this time getting to grips with the issue, as the longer I work with the MDAC2 design the greater confidence I gain with its behavior and stability.

Now to carry on building the prototype PCB, much more ahead still to verify and test :)
 
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