The PSU is very high efficiency, allowing us to use the MDAC's original AC Adaptor despite the greatly increased power requirements of the MDAC2 design (High Current ClassA output stages, Twin ESS DAC's, PECL Logic clock distribution, Twin ADC's, FPGA & DSP etc).
The output of the PSU showing the noise floor at -170dB (0dB Ref. 3.4V) 8192K points FFT:-
https://dl.dropboxusercontent.com/u/86116171/OP6TH3V4.jpg
The noise floor at -170dB (and the mains related spurie) are artefacts of the measurement system & and hum Pickup on the lab bench.
Combined with the Clock measurements I'm extremely happy with these results
Clock and PSU performance result are "limited" by my "state of the art" test equipment - which I guess I can see say is decent days work (OK it was months of work)