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DIY Sony VFET kit store information page...

I managed to have a meeting in the first window and an interview during this mornings window.....must get my priorities right....:mad:
 
I managed to have a meeting in the first window and an interview during this mornings window.....must get my priorities right....:mad:

IIRC you work in semi manufacturing, what would be the tooling costs for a SIT production run?.
 
Well I for one didn't :( so it's fingers crossed for round 2.

In an ideal world (!) I'd like to hear one driven by an F4 but that may take a while.

It's been fun so far and several folk have gone out of their way to make the distribution as fair as possible. If anyone else has been hit by the new minimum order value post-Brexit, I don't mind taking on a group buy for any of the store pcbs that are in stock, matched fets, etc, subject to sufficient interest. Failing that, I'll be placing a larger order in July/August and could post here or in a new gb thread when I'm ready, once again if there's any interest.
 
IIRC you work in semi manufacturing, what would be the tooling costs for a SIT production run?

Not any more luckily, it's a dead art in the UK for the most part.

The costs would be large, it's not a matter just a matter of 'tooling' but more a matter of recipe.
You'd need to find a suitable fab to run it in.
You'd then need a modeled electrical and physical layer design before even committing to wafer.
If you needed something other than a standard off the shelf wafer type (undoped/predoped) then you need to specify that (will be OK if running it on a known process)
If you're using the fabs own process recipe then that's fine but if not then you need to design this.
Next comes the sets of masks you need to apply each layer, luckily not that many in a product like this.
Then you'll start a prototyping run, probably a half or full batch with 'splits' across wafers to try to find the sweet spot for the end product.
These will all have to be tested at wafer level to find out what meets the expectations and spec you've decided on in your electrical model.
Queue a few batches as you play with parameters and recipe (hopefully not that many iterations to get to an end result).
Once you've hit the sweet spot and proved it works you can start to run qualification batches to prove you can build it consistently and it doesn't 'pop' when its run within parameters.
You'll need to mount, encapsulate and run each part through a tester/test program and qualify using a stress test (e.g. HTOL/LTOL).
Now its probably ready to put in an amp.

And that's assuming you get it right first time, it's a game of snakes and ladders sometimes.

Commercially it would be a dead duck, the best way to get something like this done is through a University fab as a project for graduates.
 
Someone on DIYaudio stated as 'fact' that the small run NP ordered from Semi-South some years ago (which iirc they were already tooled up for) required a cheque for half a million dollars.
Nelson usually keeps that sort of info to himself, unsurprisingly, so where the figure came from is anyone's guess.
 
Not any more luckily, it's a dead art in the UK for the most part.

The costs would be large, it's not a matter just a matter of 'tooling' but more a matter of recipe.
You'd need to find a suitable fab to run it in.
You'd then need a modeled electrical and physical layer design before even committing to wafer.
If you needed something other than a standard off the shelf wafer type (undoped/predoped) then you need to specify that (will be OK if running it on a known process)
If you're using the fabs own process recipe then that's fine but if not then you need to design this.
Next comes the sets of masks you need to apply each layer, luckily not that many in a product like this.
Then you'll start a prototyping run, probably a half or full batch with 'splits' across wafers to try to find the sweet spot for the end product.
These will all have to be tested at wafer level to find out what meets the expectations and spec you've decided on in your electrical model.
Queue a few batches as you play with parameters and recipe (hopefully not that many iterations to get to an end result).
Once you've hit the sweet spot and proved it works you can start to run qualification batches to prove you can build it consistently and it doesn't 'pop' when its run within parameters.
You'll need to mount, encapsulate and run each part through a tester/test program and qualify using a stress test (e.g. HTOL/LTOL).
Now its probably ready to put in an amp.

And that's assuming you get it right first time, it's a game of snakes and ladders sometimes.

Commercially it would be a dead duck, the best way to get something like this done is through a University fab as a project for graduates.


I was assuming the design information would be bought or licensed from Sony , Yamaha or Tokin. I think graduates today would look at it much as a steam engine, it’s your hobby, you build it! One of my friends built some ridiculous JFETs for an MC phono stage as an undergrad but can’t remember what became of them.
 
Someone on DIYaudio stated as 'fact' that the small run NP ordered from Semi-South some years ago (which iirc they were already tooled up for) required a cheque for half a million dollars.
Nelson usually keeps that sort of info to himself, unsurprisingly, so where the figure came from is anyone's guess.

iirc - that was a case of buying/securing a batch of a process, a known part already in the foundry, before it went-away forever. Upfront payment for a production part in the last throes of production (Semisouth obvs having lost a packet on it the whole production scope themselves)

What JimmyB explains above would be an order of magnitude or more again... at least
 
The place to go would be India. There's guys there with a PhD running shift production who are waaay smarter than we ever were.
Older equipment but they have a knack of working magic to produce stuff at excellent prices.
One Indian guy I worked with at Intel came on board as a technician, after much complaint from us he was eventually whisked away to do cutting edge process design in Oregon. Lovely guy, had good laughs with him but as I told him, he's just making us all look bad so we grassed him to the higher powers! :D Was so good to see his face when he got called up, that was a good party.
 
I could ask them, not sure what they're currently doing but can always ask the ClasSiC boys at the next night out in Edinburgh.

By the way, these aren't big fabs left in the UK, it's old stuff and large geometries.

I decided to give it up when at an interview down south they asked me what I knew about the quality of the raw wafers because 'they struggled to get 50% yield'.....from Shin-Etsu wafers. :eek:o_O
 
Nice story about raw talent being recognised, and rewarded! : )

It was good to see a company take heed and actively recognise talent like that instead of letting it fester. He's doing really well for himself now, a shooting star with no end in sight.
Intel was a good company to work for.
 
I could ask them, not sure what they're currently doing but can always ask the ClasSiC boys at the next night out in Edinburgh.

By the way, these aren't big fabs left in the UK, it's old stuff and large geometries.

I decided to give it up when at an interview down south they asked me what I knew about the quality of the raw wafers because 'they struggled to get 50% yield'.....from Shin-Etsu wafers. :eek:o_O

Sorry you will have to explain that!, I assume 50% is bad but no idea how or why.
 
Yeah, sorry, I forget these companies aren't household names.
Basically Shin-Etsu are a major high quality manufacturer of silicon wafers for the industry and because it's a grown crystal you can pretty much be sure that the wafers they supply are spot on. They've been in the business too long to have poor quality.
The 50% was never down to the incoming wafers and the fact that the manager who interviewed me asked this question showed he didn't have a clue and the process and test engineers were spinning him a yarn (they'd have known). Hence, if I was to be managed by him then it would have been a constant training exercise and why should I train someone paid more than me!
I actually knew the manager guy before the interview, he'd been a high flyer graduate and could talk the talk but he'd been in a defence company with no semiconductor background. Not a bad guy but I'm not on this earth to help keep his head above water!
The 50% was due to their poor process and likely aged processing systems and a design that was right on the process margins.
 
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I guess if it’s a major manufacturer then the world and his wife would be screaming blue murder if it was a wafer quality issue, the fact that they weren’t should have told the manager all he needed to know.
 
On the matter of cost, Nelson's subsequent comment was: " I got 1900 and the cost was not nearly that high." One more figure plucked out of nowhere, acquiring spurious credibility on line.
 
If they've made them before, it's not been an end of life product, then as long as the equipment is still in play and they have the recipe it'll not be as bad.
 


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