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Keeping amused

Arkless Electronics said:
Hmmm... let's just say it's not something I would ever do personally other than with FET's.
Click to expand...

Why is that?
I was looking at using a JFET+ resistor between gate & source as a low component-count current source for currents of order 1mA. But (looking at Mouser for example) the only JFETs available cheaply are all switching types, with very large tolerance on gate-source cut-off voltage. So setting the current would involve resistor tweaking which is not ideal.

So what's bad (other than extra components, i.e. 2 x bipolars, 2x resistors) about using a bipolar-based circuit to make a two-terminal current source?

Or do you have any suggestions for suitable (cheap) FETs?

Current-limiting diodes seem to be available but expensive (and tolerance much poorer than easily achievable with bipolars).
 
Main drawbacks I can see with ring of two are temperature coefficient (set by temperature coefficient of VBE, some others are more stable), parts count (4) and it really needs a bit over 2V to work, so that both transistors are biased on.

At low currents (<1mA) the JFET ones can work to about 1V. Although there are some higher current JFET CRD parts, they have large knee voltages and annoying thermal behaviour. And, as said in last post, tolerance is grim.

I would argue that NPN devices have better Early voltage (at least in Silicon), so might be a better choice in cases where either option is viable.
 
I cannot think of any genuinely two terminal floating CCS, using a single device, other than the FET one.

IIRC from my own experiments of some time ago 6V ish is about the min for a FET CCS when delivering currents around 10mA, and preferably higher.
 
Here's a suggestion for that problem PD: A pair of dual transistors, one pair NPN the other PNP, made into current mirrors on the dual rails and with a resistor between the current programming inputs to set the output currents to 30mA. Assuming regulated voltage rails the accuracy should be good enough and the matched devices should need little or no emitter degeneration hence should work to <0.5V across them. For greater accuracy you could make a 30mA floating CCS with a depletion mosfet and put this in place of the resistor.
 
It gets me to 5 parts (3 if I cheat and say a dual is one part), but yes that is a lovely idea. I will try it now.

Isn't there a part in a dip package that has two matched pnp and two npn? I think it might be a SSM part number?
 
Part is THAT 340 - not cheap £7.75 from mouser. There some other surface mount choices.

Now I think about it, if a resistor is connecting the two programming inputs of the mirrors, don't we just end with a current of roughly 2 x (V - 2Vbe) / R ? Where V is the voltage between the terminals?
 
PigletsDad said:
It gets me to 5 parts (3 if I cheat and say a dual is one part), but yes that is a lovely idea. I will try it now.

Isn't there a part in a dip package that has two matched pnp and two npn? I think it might be a SSM part number?
Click to expand...

I've used that basic idea or variants for several things over the years:)

There are loads of cheap as chips duals in SMD but rather less of what you describe! Certainly there were some SSM types, maybe a much older cheaper CA3046 type variant but 2 of each type and you could look at Thats devices.
Prob talking like 40p each for duals and £6 for the quad though!
 
Arkless Electronics said:
I cannot think of any genuinely two terminal floating CCS, using a single device, other than the FET one.

IIRC from my own experiments of some time ago 6V ish is about the min for a FET CCS when delivering currents around 10mA, and preferably higher.
Click to expand...

Well, to replace the current regulator diodes in the original B4 circuit I was considering a ring-of-two with the bias resistor connected to the collector of the topmost transistor, rather than to the positive rail.

I guess the best choice of current-source, both topology and device type, is very much according to the exact application, based on the main behavioural parameters of output impedance, temperature stability, voltage-drop, and design predictability - i.e. repeatability without recourse to device selection or resistor tweaking/adjustment (for which JFETs look pretty poor), and also considering component count and cost. Not helped by the fact that data sheets often don't include some important parameters (e.g. to enable prediction of Early effect in bipolars and the equivalent channel length modulation effect in JFETs).

Very often some of those behavioural parameters may be less important. It would be a handy addition to any electronics text book to compare the main options in this way - not sure if this exists anywhere.

For the B4 circuit, I think high impedance and reasonable predictability (so a each pair of source in the two halve of the curcuit match reasonably well) are the most important.
 
gustavm said:
Well, to replace the current regulator diodes in the original B4 circuit I was considering a ring-of-two with the bias resistor connected to the collector of the topmost transistor, rather than to the positive rail.

I guess the best choice of current-source, both topology and device type, is very much according to the exact application, based on the main behavioural parameters of output impedance, temperature stability, voltage-drop, and design predictability - i.e. repeatability without recourse to device selection or resistor tweaking/adjustment (for which JFETs look pretty poor), and also considering component count and cost. Not helped by the fact that data sheets often don't include some important parameters (e.g. to enable prediction of Early effect in bipolars and the equivalent channel length modulation effect in JFETs).

Very often some of those behavioural parameters may be less important. It would be a handy addition to any electronics text book to compare the main options in this way - not sure if this exists anywhere.

For the B4 circuit, I think high impedance and reasonable predictability (so a each pair of source in the two halve of the curcuit match reasonably well) are the most important.
Click to expand...

Amen to the bit I highlighted!! Early voltage is hardly ever mentioned, even for transistors where it is important.

Another big bugbear with datasheets (although I can see their reasons) is that, increasingly these days as all the best devices get obsoleted, we have to use devices for purposes other than that which the manufacturer intended.
Hence a fast switching medium current transistor may have low Rbb and work great as a low noise transistor at low Z but not a hint of this will be given in the data sheet... they're flogging it as good at switching so it is an irrelevant parameter to the manufacturer.

The impedance's at the relevant points in the B4 are low enough for there to be no real point in improving on the CRD's. You may get improved compliance but it's pretty irrelevant at line levels.
 
OK, I now have a buildable draft circuit, although the schematic needs re-drawing - now looks like something the dig has sicked up.

I have modelled the circuit including power supply.

Clips at about 9W into 8 Ohms. At 8W, third harmonic is dominant (as you expect close to clipping), but no 100Hz intermodulation sidebands are visible from the power supply. At 1W, almost pure second harmonic, about 70dB down on the fundamental. Results are the same at 10kHz, 1KHz and 100Hz. Decent 10KHz simulations take a while, as you have to use a short time step.

My main remaining concern is the power-on thump. If I do nothing, it goes to about 1.5V, and lasts maybe 40ms. This would be OK into speakers (although not nice for a directly connected high frequency driver), but might be nasty for headphones? I can add a capacitor to the bootstrap bias network, which delays output stage startup, and then the thump is only 100mV and is over in 10ms, which I expect would be OK for headphones.

Noise at the output has a trace of 100Hz and some rapidly falling harmonics, about -100dBW. Even with really sensitive speakers that will be way below the threshold of audibility. Not sure if that level would be an issue for headphones?

Broadband noise at the output is predicted to be white (device models almost never include 1/f noise), and about 40nV/rtHz at the output. In say 10Khz, this is 4uV rms, which is about -117dBw. Again, even with say a horn loaded compression driver, this will be below the threshold of audibility. For headphones, I expect also OK?

Have ditched the current source in the diamond stage, it didn't make enough difference to be worth the extra complexity.
 
PigletsDad said:
Putting real components in has knocked the performance back a bit! One issue is a 30mA current source, with about 2V across it. For now, I have popped a 68R in the simulation, which is hardly high impedance. It is not enough voltage to get over the knee voltage of a constant current diode (or other FET circuit) at that current. What should I use with a low parts count? Ring of two would work well, but is two bipolars and two resistors. There are various single transistor types, with some sort of reference like a LED, which would be a diode, a bipolar and two resistors. Can anybody suggest something simpler still?
Click to expand...

Just wondering how you are getting on? Also out of amusement, but not with any real intention to build (& also recovering from an op) I've been playing in LTSpice with a higher power version of the B4 type circuit - i.e. same topology, but using Sziklai pairs in place of the original output transistors. Currently the main collector currents set at about 800mA to give roughly 2 watts into an 8 ohm load under Class A conditions. Distortion ~ 0.0002% at ~ 1watt at 1kHz, 10kHz figure very similar. With the bootstrapped floating supplies this could be thought as as Class AB and is therefore capable of giving much higher output power - its quite nice under LTSpice to monitor current through the emitter resistors, and using .TRAN to step the peak-peak input signal voltage, to observe the transition from Class A to Class B.

Still using idealised current-sources and floating supplies (though I don't think real ones will change performance much, having dabbled with same on the original B4 circuit).

With real-World floating supplies this circuit ends up as quite complex and producing quite a lot of heat, so not sure its really competitive, but just a way of learning how to use LTSpice, which I'd not used before. Also - lack of any overall feedback means its output impedance relatively is high at ~ 0.5ohm.
 
Yes, looking quite promising. I have detailed simulations including power supplies, to study things like turn-on transients and PSU intermodulation near clipping. No cheating in schematic at present. Getting about 8W just below clipping.

Some interesting nice properties that have popped out include:
  • Short circuit safe
  • Stable with capacitive loads (bit of overshoot). For belt and braces, could add output Zobel, but not really needed.
  • Small turn on thump, only about +/- 50mV. Negative for a few ms, then +ve for 20ms, then falling back to 0. Could be connected safely to very delicate drivers like tweeters. 50mV into 8 ohms is 300uW.
  • Distortion is frequency independent over wide range
  • Low noise floor (something like -110dBW), which hardly changes until close to clipping
  • PSU intermod sidebands are really low (>120dB down) even at 1W. Not studied these before, but takes some care to eliminate.
  • Distortion is dominated by 2nd harmonic up to about 1W, although 3rd harmonic rises with increasing power (as expected) and dominates close to clipping.
  • Gain about 14dB, so full power requires about 1.6V rms, very compatible with red book digital sources.
  • No bias adjustment needed.
  • Offset adjustment
  • Easy to change upper and lower bandwidth limits, for integration into active systems.
Uses a dual JFET in the input LTP, specified LSK489, as this has low noise and good offset match, and the right transconductance, available from Mouser. All other parts are fairly cheap and available from multiple suppliers. Needs two transformers, a small one for front-end (15-0-15) and bigger one for output stage (12-0-12, 160VA)

I will put a schematic up when I have re-drawn it enough to be understandable - very messy at present with wiring wiggling all over the place as I have changed my mind and added and removed parts.
 
Are you sure 160VA is enough for 8WPC?:rolleyes::)

Up and running in real life then yeah?

My current WIP has had major changes, mainly to improve the former abysmal PSRR, which I was going to deal with using super duper regulated supplies. Now simming as 125dB PSRR and an improvement in THD to 0.003% @ 50W open loop @ 20KHz. If it does that in solder and silicon I'll be a happy bunny:)
 
Arkless Electronics said:
Are you sure 160VA is enough for 8WPC?:rolleyes::)
Click to expand...
Probably; it's enough for my headphone amplifier that runs to about the same into 8ohms .. ;)

And - Jez -re your WIP - can't wait to get more hints on that in due time. Your previous comments amounting to significant active gain of supply rail noise had me wondering what on earth you were/ are trying (bizarre 'reference' choices? shurely not - but if so, why...)



ATB to both nascent designs!

 
martin clark said:
Probably; it's enough for my headphone amplifier that runs to about the same into 8ohms .. ;)

And - Jez -re your WIP - can't wait to get more hints on that in due time. Your previous comments amounting to significant active gain of supply rail noise had me wondering what on earth you were/ are trying (bizarre 'reference' choices? shurely not - but if so, why...)



ATB to both nascent designs!
Click to expand...

Earlier versions used folded cascodes but I wanted to maximise voltage compliance to avoid needing 2 sets of rails so went for telescoped cascodes with very good regulators (all discrete) to give around 110dB PSRR in spite of the active gain of about +25dB at that node (input of a common base amp in effect!). Went back to folded cascodes giving about -6dB PSRR and then concentrated on really good cascoded CCS's which now give whole thing about -125dB PSRR without the super regulators (which I could still add of course) but now need PSU about 6V higher than OPS volts to maximise power at clipping. It's all about compromises is this engineering thingy:rolleyes: It's class A so if built to give the full 50W rather a beast. The last thing I want here is for the OPS/main PSU to be capable of 50W but only say 40W realisable due to lack of voltage compliance as the missing Watts will make no difference to the dissipation, hence even worse efficiency... a 40WPC class A amp that dissipates as a 50WPC one:eek: Yeah I could restrict OPS Volts and turn down the bias but the TX's I have to hand are going to give +/-35V hence about 50WPC. Try getting 0.003% THD @ 20KHz open loop when it's moved out of class A!

My current extant and in everyday use class A design (15W monoblocks) is near as damn it R2R capable with only a single rail for just this reason.
 
martin clark said:
I reckoned it was a folded-cascode issue the first time you mentioned it.. think I posted so... thanks for being so candid!
Click to expand...

Yes, you did... but it was more a telescoped cascode issue and not really an issue as I was aware of the erm issue and willing to counteract it by huge PSRR derived purely from regulated supplies. Swings and roundabouts.... gaining around 30dB PSRR overall by going back to my original folded topology, with further tweaks, just felt more "right"... god knows how it will end up in practice when actual listening gets involved!
 
160VA chosen because I had the parameters to put in the simulation to hand! Output is biased at about 1.1A, and AC sources in the simulation are 18.3V (peak, 12V rms + regulation), so I guess actual dissipation is maybe 40W (there are some losses from the extra voltage needed for the bootstrapping, and various resistor drops). I guess you could go quite a bit smaller, although you never want to run a transformer at its design rating steady state - you have no margin for high mains voltage and so on. Something like 80VA would be more sensible, unless you want to run multiple channels off one transformer.
 
PigletsDad said:
Yes, looking quite promising. I have detailed simulations including power supplies, to study things like turn-on transients and PSU intermodulation near clipping. No cheating in schematic at present. Getting about 8W just below clipping.

Some interesting nice properties that have popped out include:
  • Short circuit safe
  • Stable with capacitive loads (bit of overshoot). For belt and braces, could add output Zobel, but not really needed.
  • Small turn on thump, only about +/- 50mV. Negative for a few ms, then +ve for 20ms, then falling back to 0. Could be connected safely to very delicate drivers like tweeters. 50mV into 8 ohms is 300uW.
  • Distortion is frequency independent over wide range
  • Low noise floor (something like -110dBW), which hardly changes until close to clipping
  • PSU intermod sidebands are really low (>120dB down) even at 1W. Not studied these before, but takes some care to eliminate.
  • Distortion is dominated by 2nd harmonic up to about 1W, although 3rd harmonic rises with increasing power (as expected) and dominates close to clipping.
  • Gain about 14dB, so full power requires about 1.6V rms, very compatible with red book digital sources.
  • No bias adjustment needed.
  • Offset adjustment
  • Easy to change upper and lower bandwidth limits, for integration into active systems.
Uses a dual JFET in the input LTP, specified LSK489, as this has low noise and good offset match, and the right transconductance, available from Mouser. All other parts are fairly cheap and available from multiple suppliers. Needs two transformers, a small one for front-end (15-0-15) and bigger one for output stage (12-0-12, 160VA)

I will put a schematic up when I have re-drawn it enough to be understandable - very messy at present with wiring wiggling all over the place as I have changed my mind and added and removed parts.
Click to expand...

Would you care to extrapolate about the PSU intermod?
 
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