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Keeping amused

PigletsDad

My intelligence test came back negative.
While I am stuck at home recovering, I have had a little fiddle with LTSpice, looking at a small power amp that uses a scaled up version of the B4 as its output stage. This is very preliminary, and I won't show a schematic, as it is full of cheats like perfect current sources and voltage sources, and is more complex than needed.

The idea is for a small class A amp, maybe 4W into 8 Ohms, with low feedback for use in places where quality beats quantity. I was thinking of things like tweeter drive in active systems if the tweeters are very sensitive, horn loaded speakers or small near field systems.

Think of it as sort of place people might use a SET amp, but with less 2nd harmonic, low output impedance and a flat frequency response.

If I come up something that is buildable, I will post a schematic and some numbers.
 
+1 for headphone use.

Also good for those of use who use sensitive speakers, or no longer care for really, really loud noises. 4w is double what I've ever seen driven (using a repurposed Avo8 meter) into my Quad 989 ESls ... I've blong een thinking upon sim lines, around the 8-10w mark.
 
Or low impedance headphones, indeed. There are some AKG ones intended to be driven from a power amp., I think.
 
Ok, well that doesn't seem promising.

The diamond output stage has low distortion at low frequencies, but is not competitive at say 10kHz. Not sure I understand what the problem is in detail, as there are heaps of open loop bandwidth, but it harmonic distortion rises rapidly with frequency. We are miles from class B, so it isn't turn-on / turn-off effects. I could use lots of feedback to force it down, but that is not what I had in mind.

I'll try a more conventional output topology, and see what's up, and make sure it is not a simulation artefact.
 
This has an 8 Ohm load, and I suspect that the current dependent non-linearities are the problem. Bootstrap seems OK, certainly tracking output very closely, and the inner part has some PSRR, so I don't think it is bootstrap accuracy.

I will try varying load impedance, which will give a clue if it current modulation of device parameters. I don't instantly see why it is so much worse at 10K than 1K - unless it is simulation under - sampling / aliasing? Also try fiddling with maximum time step.
 
OK, at least part of the problem was simulation - maxstep of 1U has fixed that.

Now have to understand what is good or not from scratch. As it stands, going from 8Ohm to 16 Ohm load reduces distortion by about 6dB. 2nd harmonic dominant, rest falling in smooth sequence. Vey low feedback, but some. Nice clean FR, naturally falling with -3dB at about 1.5MHz, so would want front end RF stopper. Would probably choose say -3dB at 60kHz, but that is a matter of taste.

For 1kHz, 4W into 8 Ohms, get 2nd harmonic at about -70db ref fundamental - say 0.03%. Would expect that to drop by a factor of 2 for each halving of amplitude, so at 1W get 0.015%, and higher harmonics would fall into noise floor at lower levels. At these sort of levels, 2nd harmonic is inaudible, so not an issue. Output stage has great PSRR (well over 100dB above 10kHz), thanks to bootstrap. Front end PSRR not great; -ve rail only -46dB, +ve rail 60dB, so front end needs relatively clean supply, with total noise no more than a few mv. Not an issue to do that, even 7815 / 7915 would be enough, or CRCRC.

Still many cheats in schematic, so slowly make it a bit more real.
 
Putting real components in has knocked the performance back a bit! One issue is a 30mA current source, with about 2V across it. For now, I have popped a 68R in the simulation, which is hardly high impedance. It is not enough voltage to get over the knee voltage of a constant current diode (or other FET circuit) at that current. What should I use with a low parts count? Ring of two would work well, but is two bipolars and two resistors. There are various single transistor types, with some sort of reference like a LED, which would be a diode, a bipolar and two resistors. Can anybody suggest something simpler still?
 
For 30mA at < 2v and decent high output impedance - LM334, set resistor, and small pass PNP transistor?

See fig 20 of the datasheet. https://www.ti.com/lit/gpn/lm334

NB it also notes a dab of RC- may be needed for stability (hint on values is given in fig 26).
So - five parts; no help at all...
 
Putting real components in has knocked the performance back a bit! One issue is a 30mA current source, with about 2V across it. For now, I have popped a 68R in the simulation, which is hardly high impedance. It is not enough voltage to get over the knee voltage of a constant current diode (or other FET circuit) at that current. What should I use with a low parts count? Ring of two would work well, but is two bipolars and two resistors. There are various single transistor types, with some sort of reference like a LED, which would be a diode, a bipolar and two resistors. Can anybody suggest something simpler still?

Does it have to go down to DC?? I had a similar problem recently and completely solved it by a good old fashioned bootstrap..... there was a follower as part of the design anyway which I used to drive it so in this case it only added a resistor and a capacitor. Ring of two hardly high parts count though and MUCH better than FET or single transistor CCS.
 
I think once I get a modest factor beyond the simple resistor, performance will be limited by other things, so not worth trying too hard. The transistor is running about 30mA, so the emitter impedance is about an ohm. 68R gives us roughly 100:1 rejection, so an impedance of a few K should be enough to make something else dominate.

Bootstrap would do, although it will need a chunky cap to go down to say 10Hz - if I split the 68R into two 33s, then I need something like 500uF. So I still have 3 parts (two R and a C), and the C is probably physically larger (but only costs say £1). And if I want reasonable effective impedance in the mid bass, I might need the corner lower than 10Hz.

I will try the single transistor CCS, as I think it is good enough in this particular case.
 
..something like old red led, fed from 1k to 2k2 (at 0.4v overhead) so about at most 1/8 - 1/3rd of reference current used to drive the bjt base; BJT with c.33R emitter resistor; mental estimate of Zout of what, c 15K ..?

Interesting problem!
 
Top marks for lateral thinking! Can you still get them?

I can push the 2V up a bit, which may make a big difference, as it is uncomfortable close to 3 Si diode drops.

I believe so yes but not so cheap. AC128/127 probably one of the more easily available complementary pairs... assuming you need to hang things from both rails...
 
Prompted by this, I've started to play around with some LTSpice simulations around the original B4 circuit which is new to me. I have a few questions about this, and it may be best if I started a new thread specifically on this. But a few observations and initial questions:

1/You mentioned you have higher distortion that you would like. I havn't seen your circuit, but the original B4 (with no overall feedback) shows increasing distortion with reduced load impedance. This is to be expected as the greater current swing results in more variation in Vbe drop across the output voltage cycle - so isn't quite a high degree of overall feedback essential to resolve this? (Which if course implies the need for an internal voltage gain stage.) My simulations of the B4 driving high output impedance (e.g. > 1k) shows very low distortion, so in this mode the bootstrapped EFs do very well.

2/Not sure how widely known this is - possibly well-known to you, but to get sufficient resolution of harmonic distortion via .four analysis, the tweaks I used were:
.OPTIONS numdgt = 7 (forces higher number resolution)
.OPTIONS plotwinsize = 0 (avoids data compression?)
I'm not sure the former made much difference, but the latter had a dramatic effect.
Providing the time-window you pick is an exact multiple of the period of the sinusoid signal you are using, there should be no alias effects.
With these settings, for the original input signal, I can resolve zero distortion to 0.000000% (and into 1K load, the B4 gives me ~ 0.0005% THD for a 4 volt p-p 1kHz signal)

3/Not sure why, but when using input and output capacitors as per the B4 design, distortion figures rose dramatically compared with what I got using impractically high values (I changed 0.47uF to 0.47F and 2.2uF to 2.2F). Not sure why this should be given the capacitors are "ideal" I believe.

From what I can tell, LT Spice seems to sort out DC equilibrium conditions, so is fine even with such ridiculous capacitor values.

4/The output of the .four analysis gives two values for Total Harmonic distortion, a first value followed by another in brackets. Sometimes these are very similar values, sometimes the latter is much greater by orders of magnitude. Anyone know what these mean? (I havn't found a pdf manual for LTSpice yet - not sure if there is one.)
 
Ok, well that doesn't seem promising.

The diamond output stage has low distortion at low frequencies, but is not competitive at say 10kHz. Not sure I understand what the problem is in detail, as there are heaps of open loop bandwidth, but it harmonic distortion rises rapidly with frequency. We are miles from class B, so it isn't turn-on / turn-off effects. I could use lots of feedback to force it down, but that is not what I had in mind.

I'll try a more conventional output topology, and see what's up, and make sure it is not a simulation artefact.

I guess you have seen this https://www.audio-perfection.com/spice-ltspice/distortion-measurements-with-ltspice/

but if not…. This is when I crave more CPU power.
 
Prompted by this, I've started to play around with some LTSpice simulations around the original B4 circuit which is new to me. I have a few questions about this, and it may be best if I started a new thread specifically on this. But a few observations and initial questions:

1/You mentioned you have higher distortion that you would like. I havn't seen your circuit, but the original B4 (with no overall feedback) shows increasing distortion with reduced load impedance. This is to be expected as the greater current swing results in more variation in Vbe drop across the output voltage cycle - so isn't quite a high degree of overall feedback essential to resolve this? (Which if course implies the need for an internal voltage gain stage.) My simulations of the B4 driving high output impedance (e.g. > 1k) shows very low distortion, so in this mode the bootstrapped EFs do very well.

2/Not sure how widely known this is - possibly well-known to you, but to get sufficient resolution of harmonic distortion via .four analysis, the tweaks I used were:
.OPTIONS numdgt = 7 (forces higher number resolution)
.OPTIONS plotwinsize = 0 (avoids data compression?)
I'm not sure the former made much difference, but the latter had a dramatic effect.
Providing the time-window you pick is an exact multiple of the period of the sinusoid signal you are using, there should be no alias effects.
With these settings, for the original input signal, I can resolve zero distortion to 0.000000% (and into 1K load, the B4 gives me ~ 0.0005% THD for a 4 volt p-p 1kHz signal)

3/Not sure why, but when using input and output capacitors as per the B4 design, distortion figures rose dramatically compared with what I got using impractically high values (I changed 0.47uF to 0.47F and 2.2uF to 2.2F). Not sure why this should be given the capacitors are "ideal" I believe.

From what I can tell, LT Spice seems to sort out DC equilibrium conditions, so is fine even with such ridiculous capacitor values.

4/The output of the .four analysis gives two values for Total Harmonic distortion, a first value followed by another in brackets. Sometimes these are very similar values, sometimes the latter is much greater by orders of magnitude. Anyone know what these mean? (I havn't found a pdf manual for LTSpice yet - not sure if there is one.)
Capacitor coupled circuits take a long time to settle sufficiently to avoid contaminating distortion measurements. You need to have a tstart which is many times the RC time constant to get a flat baseline. So if you want to measure things at say -120dB (parts per million) you need to wait about 14 time constants. So using smaller caps helps! But your .tran ends up looking like .tran 140m 150m 2U or whatever. So I normally just do DC coupled simulations, and add the coupling caps at the end.
 


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