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The John Westlake/Lakewest MDAC/FDAC, VFET and Detox

Though he did post this earlier in the year.

Hi Joseph,

Yes ineed I sould build such a system, but I would be "Killed" if I diverted my time away from completing the MDAC upgrade.

I have an Agilent E5505 PN system - so on the next PCB spin, I will construct a pair of "identical" Oscillators - using one as a referance and added 3dB to the PN plots (OK the system software automatically compensates and adds the 3dB in "twinned" oscillator tests).

Once the first MDAC update PCB's have been shipped, it be great to visit you, understand your setup and start to consider building a system - idealy with custom PCB's (with Andrew's OK and blessing).


I hope Joseph is in no rush.
 
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Hello guys,
It's been awhile – with a lot to recall and report:-
FPGA core development – I worked on a completing “FPGA circuit blocks” - and spent some time developing the DAC Array data randomization block – which led to some hard thinking / development. In the end I coded techniques used in the Enigma machine to serve as the Array data randomizer - like the later Navy Enigma machines I implemented a 4 rotor scheme (with 16 positions on each "rotor") . It took a few days to understand the inner workings of the Enigma machine - create working schematics and simulation's - then code in the FPGA . Once I had created the schematics / simulations it made things much clearer in my mind....
The Array randomization block results in 20,922,789,888,000 Permutations without Repetition... I now understand why ESS chose a simple circular type array data "rotator" rather then true DAC Array randomizer... Still, I now I have the randomization block "understood" in my head - and worked on coding the FPGA. I encountered problems with the FPGA software development tools which has stalled final completion of the block - however I now have direct access to the key software developers for the FPGA software tools and have some solutions to try (which I well get back to once I've completed some PCB worked I started while I waited for the FPGA toolchain issues to be understood / resolved).
System MCU software development - I spent a coupe of weeks working on the MCU code that controls the Clock block (clock calibration / control etc.) - this was completed to the stage where I completed the complex tasks and could then confirm the exact MCU part number (memory / hardware resources etc).
The industry wide semiconductor situation appears to be getting worst each day - so I had to place orders and purchase the MCU's to cover the sponsor units production - to fund I had to sell my turntable setup
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only then to have Mouser move the shipping date for these MCU's from Mid January to end of MAY!!! I can only hope that this date does not slip further – I'm rather gutted as I sold my turntable setup to finance these IC's “quickly” only to see the delivery date slip to May!!!
I'm currently cannibalising MCU development boards to build the prototype units so I can still work on development without waiting for he production order IC's to arrive.
For sure, the semiconductor supply will have a massive impact on production – but I'm doing my best to try and source / stock critical components as finances allows...
I ordered Evaluation boards for a couple of IC's used in the advanced clock block variants – these then where delayed in Customs for over a month – in fact I still have some parts sitting in customs for over 1.5 months now - when the boards did arrive there was no explanation for the extended delay , only a message on the postage website about Covid induced delays...
I had to take a risk and purchase from Japan a critical piece of equipment to allow me to develop / production QC the level 3 clock block units – it was being sold for a 10th of its normal used value (untested) – sadly once it arrived it proved to be non functional – so I'm hoping I can repair or find a unit with a different issue and use the second unit for spares... I've not had the time to look into the issue to closely – again painful as funds are so very tight as I struggle to purchase long leadtime production components (semiconductors)...
So while bugs in the FPGA development tools was being understood and resolved – I turned back to working on the Clock Block (PCB). The clock section is divided into 7 blocks – by around Christmas I should have PCB's issued for 4 of these blocks leaving 3 blocks remaining – I worked on the most complex blocks first... which are progressing well - now about 80% complete.
I've spoken with the Crystal vendor and have the custom Crystal spec firmed up – there are upto 4 different Custom crystals required (depending on build Spec.)
Custom Crystal sample times is 8 weeks – however Covid / Christmas will extend this... I'll place the sample orders once funds allow – not to urgent as I'm working with hand selected China parts for development – and the Custom parts will be higher performance then even the best hand selected China crystals...
For development work on the Clock section – I tested / hand selected the best crystals from over 1000pcs China manufactured parts – it was eye opening to see the variance... and general low quality – OK these China Crystals cost US$0.45 instead of the ~US$10 for the pending custom parts but even the best selected parts out of a 1000+ hand selected Pcs. have a “Q” less then half of the minimum Spec. of the custom crystals..
I also managed to secure 100pcs of the NDK VC-TCXO's (which where manufactured by AKM before there factory fire) – this will allow about 20 units built of the advance clock variants... Its a shame that the advance variants will be so limited, but maybe the AKM situation might start resolve itself in the next year...
Due in part to the semiconductor supply situation, the design is VERY modular – allowing me some flexibility to redesign “blocks” to work around critical IC supply constraints... as a side benefit this also allows later “user” installable upgrades...
So in the next month:-
Issue PCB's for the 4 Clock section blocks (out of 7)...
Confirm fix for FPGA development tools + complete FPGA code for the HiBit DAC array + Array performance testing.
Then most likely complete the 3 remaining clock blocks (competing the Clock Section).
I've work on so much since my last post – I'm sure I've missed things...
As development heads towards completion and starts to wind down – from next year I plan to work part time at the mechanical / PCB sub contractor to help finance the component purchasing and allowing me to be onsite during production – I'll be glad once the first units start to ship... one of my greatest concerns now is the semiconductor situation – but working under the umbrella of a larger company expands purchasing power / component sourcing...
Sorry I've avoided Facebook etc. as I focus on completion... we are still say 6 months away – but early beta units will be in the next 4 months or so...
 
Please be gentle on him , I think this thing has overwhelmed him mentally ...but he's still trying to get there the only way he knows how.

Breakdown is not pretty, let's hope he can pull through.
 
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So he is still doing basic development (the FPGA) while spending the working capital on test equipment
Jarek was a key member of this project, John could have just off loaded all this complex software development to him. It seems without someone like Jarek on this project who is able to debug, test and improve this software, the project may never be completed. I guess John doesn't have the resources to hire anyone either.
 
[...It seems without someone like Jarek on this project who is able to debug, test and improve this software, the project may never be completed...
It's worse, these days software is essentially unlimited in code size resources.
FPGAs are very limited. When I used them (25 years ago), I had to start with a clear model of what I was trying to do to get the design to fit. His comments about the ESS ring modulator hint that he is finding his design is getting crowded.
 
Please be gentle on him , I think this thing has overwhelmed him mentally ...but he's still trying to get there the only way he knows how.

Breakdown is not pretty, let's hope he can pull through.


bollo* to that, I've been waiting well over a year for dribbles of money back on my VFET investment

my misses was diagnosed with cancer early October 21' and I practically begged him to pay the balance as she was off work for 6 weeks, and ultimately I handed my own notice in due to stress

the man is a low life, hell mend him as my mother would say

I would rather not disclose my personal circumstances on a forum, but people please waken up he deserves nothing but contempt from where I am standing


I have 17 months worth of failed promises and excuses getting my money for VFETS back from him
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Hi StephenB,

I agree to arrange to refund your VFET installment minus the the PayPal fees.

We will have to agree a repayment plan as I currently simply dont have the fund to pay you in a single installment.

I'm expecting funds in the next 1-2 months this should cover your VFET installment.

BR,

John

JohnW, Jul 5, 2020

Hi Stephen,

I'll confirm the exact PayPal amount once I have the funds to forward to you.

Basically I'm due royalties on a streamer - they are just updating the PCB files, I hope they place an order in the next month or so... I'm not even sure of order Qtys - but I believe it will cover the GBP2K...

if its short, I'll send everything they send... and work from there,

BR,

John

JohnW, Jul 6, 2020
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I have had zero payments from him since mid September, so it's looking unlikely I'll get any more,so stop giving this guy any benefit of the doubt

your money is all gone and has been for some years I'd say, so I'd summise his only revenue stream to bankroll these PFM projects is doing work for other parties
 
I should add I have threatened to post the likes above many times but foolishly gave him the benefit of the doubt

recent events compelled me to draw a line under this fiasco,but yet again zero empathy and ignoring of my messages on facebook

I have a feeling he is awaiting a huge blowout from the forums to finally bail out of all this , so heres my tuppence !
 
Sorry to hear about your circumstances Stephen. He's certainly not a man who's word is worth anything.
 


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