Hacker,
I have been thinking about how best to use the FETs.
Reducing the resistor value to get stability defeats one of the big advantages, and is a fairly ineffective method.
Instead I think you need to take two steps.
1) Use a stopper resistor to stabilise the FET (also suggested above by FDIECK).
This goes between the capacitor and the gate of the FET.
100 Ohms should be enough, although FDIECK suggests 250, but the IRF610 is reasonably low capacitance, so I think 100 should do the trick. Higher values give better stability, but will reduce rejection in the high RF. Lower values skirt with the risk of oscillation, but widen the rejection band upwards.
As FDIECK has said, mount the stopper absolutely right close up to the FET - this is a wideband RF circuit, even though it only produces DC!
2) Make sure the cap doesn't have a resonance at an embarassing frequency - this means not using too big a value close to the FET, say 0.1uF. Getting a lot of filtering probably means going to a two pole circuit.
So you want something like (warning ASCII art, may not come out)
HTML:
<pre>
Raw --/\/\---+---/\/\--+---/\/\-- Gate
100K | 100K | 100
_|_ _|_
Big (4.7uF) _ _ _ _ 0.1uF
| |
G G
</pre>
Where G is the ground symbol, which I wasn't going to draw in ASCII, /\/\ is
a resistor, and so on.
The values shown are just nominal, but I vaguely remember you had some 4.7uF caps in stock.
In principle, the first resistor could be even bigger to give more low frequency filtering - 1M would give a 5s time constant, which would be well over 70dB down at 50Hz. But it would take nearly half a minute to settle! The values shown would give about 50dB rejection at 50Hz, and over 60dB at 100Hz (the main ripple frequency).
Alternatively, you could try just using the little CAP (0.1uF or whatever you have in your bits box), and 1Meg resistor. The stopper should keep it from oscillating, and you will get worthwhile filtering.